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| FDB12N50 / FDI12N50 N-Channel MOSFET June 2007 FDB12N50TM N-Channel MOSFET 500V, 11.5A, 0.65 Features * RDS(on) = 0.55 ( Typ.)@ VGS = 10V, ID = 6A * Low gate charge ( Typ. 22nC) * Low Crss ( Typ. 12pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability * RoHS compliant UniFETTM tm Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction. D G D2-PAK G S FDB Series GDS I2-PAK FDI Series S MOSFET Maximum Ratings TC = 25oC unless otherwise noted Symbol VDSS VGSS ID IDM EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Drain Current Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation - Derate above 25oC (TC = 25oC) -Continuous (TC = 25oC) - Pulsed -Continuous (TC = 100oC) (Note 1) (Note 2) (Note 1) (Note 1) (Note 3) Ratings 500 30 11.5 6.9 46 456 11.5 16.7 4.5 165 1.33 -55 to +150 300 Units V V A A mJ A mJ V/ns W W/oC o o Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds C C Thermal Characteristics Symbol RJC RJA* RJA Parameter Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient* Thermal Resistance, Junction to Ambient Ratings 0.75 40 62.5 o Units C/W *When mounted on the minimum pad size recommended (PCB Mount) (c)2007 Fairchild Semiconductor Corporation FDB12N50TM Rev. A1 1 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET Package Marking and Ordering Information TC = 25oC unless otherwise noted Device Marking FDB12N50 FDI12N50 Device FDB12N50TM FDI12N50TU Package D2-PAK I2-PAK Reel Size 330mm Tape Width 24mm Quantity 800 50 Electrical Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS BVDSS / TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Body Leakage Current ID = 250A, VGS = 0V, TJ = 25oC ID = 250A, Referenced to 25oC VDS = 400V, TC = 125oC VGS = 30V, VDS = 0V VDS = 500V, VGS = 0V 500 0.66 1 10 100 V V/oC A nA On Characteristics VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250A VGS = 10V, ID = 6A VDS = 25V, ID = 6A (Note 4) 3.0 - 0.55 11 5.0 0.65 - V S Dynamic Characteristics Ciss Coss Crss Qg Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller" Charge VDS = 400V, ID = 11.5A VGS = 10V VDS = 25V, VGS = 0V f = 1MHz (Note 4, 5) 985 140 12 22 6 10 1315 190 17 30 - pF pF pF nC nC nC - Switching Characteristics td(on) tr td(off) tf Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time VDD = 250V, ID = 11.5A RG = 25 (Note 4, 5) - 25 60 45 35 60 130 105 85 ns ns ns ns Drain-Source Diode Characteristics IS ISM VSD trr Qrr Notes: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 6.9mH, IAS = 11.5A, VDD = 50V, RG = 25, Starting TJ = 25C 3. ISD 11.5A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics Maximum Continuous Drain to Source Diode Forward Current Maximum Pulsed Drain to Source Diode Forward Current Drain to Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, ISD = 11.5A VGS = 0V, ISD = 11.5A dIF/dt = 100A/s (Note 4) - 370 3.8 11.5 46 1.4 - A A V ns C FDB12N50TM Rev. A1 2 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET Typical Performance Characteristics Figure 1. On-Region Characteristics 30 VGS = 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Figure 2. Transfer Characteristics 40 10 ID,Drain Current[A] 150 C o ID,Drain Current[A] 10 -55 C 25 C o o 1 *Notes: 1. 250s Pulse Test 1 2. TC = 25 C o 1 10 VDS,Drain-Source Voltage[V] 20 0.1 *Notes: 1. VDS = 20V 2. 250s Pulse Test 4 6 8 VGS,Gate-Source Voltage[V] 10 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 1.4 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 100 RDS(ON) [], Drain-Source On-Resistance IS, Reverse Drain Current [A] 1.2 150 C 25 C o o 1.0 VGS = 10V VGS = 20V 10 0.8 0.6 0.4 *Note: TJ = 25 C o *Notes: 1. VGS = 0V 0 5 10 15 ID, Drain Current [A] 20 25 1 0.3 2. 250s Pulse Test 0.6 0.9 1.2 1.5 VSD, Body Diode Forward Voltage [V] 1.8 Figure 5. Capacitance Characteristics 2000 Coss Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Figure 6. Gate Charge Characteristics 10 VGS, Gate-Source Voltage [V] VDS = 100V VDS = 250V VDS = 400V 1500 Capacitances [pF] 8 Ciss *Note: 1. VGS = 0V 2. f = 1MHz 6 1000 4 500 Crss 2 *Note: ID = 11.5A 0 0.1 1 10 VDS, Drain-Source Voltage [V] 30 0 0 5 10 15 20 Qg, Total Gate Charge [nC] 25 FDB12N50TM Rev. A1 3 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature 1.2 Figure 8. On-Resistance Variation vs. Temperature 3.0 RDS(on), [Normalized] Drain-Source On-Resistance 2.5 2.0 1.5 1.0 0.5 0.0 -100 *Notes: 1. VGS = 10V 2. ID = 6A BVDSS, [Normalized] Drain-Source Breakdown Voltage 1.1 1.0 0.9 *Notes: 1. VGS = 0V 2. ID = 250A 0.8 -100 -50 0 50 100 150 o TJ, Junction Temperature [ C] 200 -50 0 50 100 150 o TJ, Junction Temperature [ C] 200 Figure 9. Maximum Safe Operating Area 100 20s Figure 10. Maximum Drain Current vs. Case Temperature 14 12 ID, Drain Current [A] 1ms 10ms DC ID, Drain Current [A] 800 10 100s 10 8 6 4 2 0 25 1 Operation in This Area is Limited by R DS(on) *Notes: 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 0.1 0.01 1 10 100 VDS, Drain-Source Voltage [V] 50 75 100 125 o TC, Case Temperature [ C] 150 Figure 11. Transient Thermal Response Curve 5 Thermal Response [ZJC] 1 0.5 0.1 0.2 0.1 0.05 0.02 0.01 Single pulse PDM t1 t2 o 0.01 *Notes: 1. ZJC(t) = 0.75 C/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZJC(t) 1E-3 -5 10 10 -4 10 10 10 Rectangular Pulse Duration [sec] -3 -2 -1 10 0 10 1 FDB12N50TM Rev. A1 4 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms FDB12N50TM Rev. A1 5 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + V DS _ I SD L D r iv e r R G S am e T ype as DUT V DD V GS * d v / d t c o n t r o lle d b y R G * I S D c o n t r o lle d b y p u ls e p e r io d V GS ( D r iv e r ) G a t e P u ls e W id th D = -------------------------G a te P u ls e P e r io d 10V I F M , B o d y D io d e F o r w a r d C u r r e n t I SD (DUT ) IR M d i/ d t B o d y D io d e R e v e r s e C u r r e n t V DS (DUT ) B o d y D io d e R e c o v e r y d v / d t V SD V DD B o d y D io d e F o r w a r d V o lt a g e D r o p FDB12N50 / FDI12N50 Rev. A 6 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET Mechanical Dimensions D2-PAK (0.40) 9.90 0.20 4.50 0.20 1.30 -0.05 +0.10 1.20 0.20 9.20 0.20 15.30 0.30 1.40 0.20 2.00 0.10 0.10 0.15 2.40 0.20 2.54 0.30 9.20 0.20 www.fairchildsemi.com 4.90 0.20 (0.75) 1.27 0.10 2.54 TYP 0.80 0.10 2.54 TYP 10.00 0.20 (8.00) (4.40) ~3 0 +0.10 0.50 -0.05 10.00 0.20 15.30 0.30 (1.75) (2XR0.45) 0.80 0.10 FDB12N50TM Rev. A1 7 4.90 0.20 (7.20) FDB12N50 / FDI12N50 N-Channel MOSFET Mechanical Dimensions I2-PAK 9.90 0.20 (0.40) 4.50 0.20 1.30 -0.05 +0.10 1.20 0.20 9.20 0.20 MAX 3.00 (1.46) 13.08 0.20 (0.94) 1.27 0.10 1.47 0.10 0.80 0.10 10.08 0.20 MAX13.40 (4 ) 5 2.54 TYP 2.54 TYP 0.50 -0.05 +0.10 2.40 0.20 10.00 0.20 FDB12N50TM Rev. A1 8 www.fairchildsemi.com FDB12N50 / FDI12N50 N-Channel MOSFET tm TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Across the board. Around the world.TM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM CTLTM Current Transfer LogicTM DOMETM E2CMOSTM EcoSPARK(R) EnSignaTM FACT Quiet SeriesTM FACT(R) FAST(R) FASTrTM FPSTM FRFET(R) GlobalOptoisolatorTM GTOTM HiSeCTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM MICROCOUPLERTM MicroPakTM MICROWIRETM Motion-SPMTM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANAR(R) PACMANTM PDP-SPMTM POPTM Power220(R) Power247(R) PowerEdgeTM PowerSaverTM Power-SPMTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM ScalarPumpTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM The Power Franchise(R) TM tm TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyWireTM TruTranslationTM SerDesTM UHC(R) UniFETTM VCXTM WireTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor.The datasheet is printed for reference information only. Rev. I26 No Identification Needed Full Production Obsolete Not In Production FDB12N50TM Rev. A1 9 www.fairchildsemi.com |
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